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关键词： Temperature measurement   Insulated gate bipolar transistors   Calibration   Temperature distribution   Junctions   Voltage measurement   Semiconductor device measurement   Insulated gate bipolar transistor (IGBT)   temperature distribution   junction temperature (T-j)   ON-state collector-emitter voltages (V-ce)   ON-state collector-emitter voltages (V-ce)  

摘要： Online junction temperature (T-j) estimation for power semiconductor device insulated gate bipolar transistor is of great importance for reliability assessment and enhancement. Typically, T-j can be online calculated using the pre-calibrated correlation with on-state collector-emitter voltages (V-ce) at loading current. However, the uneven temperature distribution inside the device during calibration is different from the conditions during operation. Uneven thermal distribution inside the device and self-heating of chips will cause significant estimation error by using the pre-calibrated T-j - V-ce correlation, as the voltage drop on interconnections will be different. In this article, a novel calibration method of T-j - V-ce relationship under pulsewdith modulation operation of device is proposed. By varying the switching frequency with fixed heatsink temperature, adjustable self-heating conditions and temperature distributions inside the device can be recreated. Moreover, a group of new relationships between junction temperature, heatsink temperature and temperature of interconnections inside device are revealed. By using the discovered relationship, the influence of uneven temperature distribution on V-ce can be compensated in a noninvasive way, which can achieve higher accuracy in T-j estimation compared to the conventional method.

关键词： Insulated gate bipolar transistors (IGBT)  

摘要： Addressing the criticality of IGBT modules in power electronics and reliability challenges in industrial applications, this study focuses on solving the important problem of solder layer aging failure in IGBT modules. Under defined operating conditions, a specific set of electrical parameters, notably the collector-emitter saturation voltage Vce (sat) , serves as a critical indicator for monitoring the degradation of solder layers within IGBT modules. This parameter is indicative of potential solder layer aging failures, which can be identified and studied to predict and mitigate such failures effectively. In order to analyze the aging trend more deeply and accurately, a new nature-inspired meta-heuristic algorithm based on Crested Porcupine Optimizer is introduced. Combining multiple data during the operation of the IGBT module, such as gate voltage, gate current, heatsink temperature, case temperature, collector-emitter current, and Vce (sat) , the parameter optimization is carried out by using CPO, and a prediction model based on the optimization of the SVR by CPO is established, which is successfully implemented to predict the accurate prediction of IGBT module solder layer lifetime. The study also validates the effectiveness of the CPO-SVR method on an accelerated aging dataset of IGBT modules provided by NASA Lab. The results of this research contribute to an in-depth understanding and prediction of the aging process of IGBT modules, which in turn improves the reliability and lifetime of the devices.

关键词： Insulated gate bipolar transistors   Junctions   Temperature measurement   Voltage   Long short term memory   Temperature sensors   Time series analysis   Insulated-gate bipolar transistor (IGBT)   long short term memory (LSTM)   maximum junction temperature   parameter dependence  

摘要： Accurate junction temperature characterization plays a critical role in the performance as well as reliability enhancement design of Insulated gate bipolar transistor (IGBT) modules. However, most current methods are only focused on predicting the temperature at a specific time rather than tracking its temporal variation. To address this challenging issue, we propose a long short term memory (LSTM) neural network-based method for predicting the junction temperature time series of IGBTs, and it can comprehensively characterize the time-dependent junction temperature according to the measured and validated experimental results. As the convolutional neural network is limited in its ability to remember temporal information, we integrate the LSTM networks for training, which can fast capture long-time dependencies in the data. Therefore, we exploit the superior performance of LSTM network for predicting the junction temperature of IGBTs here. It is shown that there is a strong correlation between the maximum junction temperature of IGBT and its parameters, such as bus voltage, load current, carrier, and output frequencies, as well as its heat sink parameters. By leveraging the LSTM-based method, an accurate time series information of the junction temperature is successfully captured under different operating conditions. Notably, in comparison with the current machine learning method, the proposed method can outperform in the same training dataset.

关键词： HVDC power transmission  

摘要： The interest in interconnecting multiple DC grids- medium-voltage direct current/high-voltage direct current (MVDC/HVDC)- across the globe has grown significantly in recent years. This interest is primarily driven by the benefits of increased reliability and cost efficiency in power transmission systems, particularly with the growing utilisation of renewable energy resources. However, some HVDC networks are based on line commutated converters (LCC), while other MVDC/HVDC rely on voltage source converters (VSC). In this context, this paper introduces a new DC-Hub that facilitates the interconnection between multiple VSC- and LCC-based DC networks using hybrid IGBT/IGCT device technology. The proposed converter enables power reversal without interruption, promotes multi-vendor interoperability, and provides galvanic isolation. An important aspect of the design is its modularity, allowing each port to have an independent design for interfacing with the HVDC/MVDC grid without affecting the other ports. This modularity enables further port extension or elimination without requiring modifications to the remaining ports. The paper also discusses AC filter design and power flow control techniques to achieve zero reactive power circulation at rated port power, thereby reducing power losses. Finally, to validate the theoretical claims of the proposed system, both a simulation model and an experimental hardware test rig have been established. © 2025 The Author(s). IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology.

关键词： Insulated gate bipolar transistor (IGBT)   Switching loss (ESW)   Forward conduction voltage (VON)   Breakdown voltage (BV)   Super junction  

摘要： In order to further reduce the switching loss (ESW), a novel floating CS layer and super-junction insulated gate bipolar transistor (FCS-SJBJ-IGBT) with internal barrier junction is proposed and simulated. On the premise of not affecting breakdown voltage (BV), the CS layer of FCS-SJBJ-IGBT is floating, so that the P-body is connected with the P-drift region, and a small part of P-pillar is formed between the CS layer and the left gate, which enables electrons to flow rapidly through this region in the on state, and provides an extraction hole path in the off state to reduce the loss. The simulation results show that,under the same forward conduction voltage (VON) condition, the turn-on energy loss (EON) of FCS-SJBJ-IGBT is significantly lower than that of the traditional superjunction IGBT (con-SJ-IGBT) and 34.5 % lower than that of the recently reported super-junction IGBT (SJBJIGBT) with blocking junction, P-pillar and N-pillar, while their turn-off energy loss (EOFF) is almost the same. The research results can provide important reference for reducing the ESW of IGBT.

关键词： silicon carbide   SiC   IGBT   NPC   rectifier   switching   telco   data center   softstart  

摘要： This study presents a novel topology designed to enhance the energy efficiency and quality of IGBT-based high-frequency rectifiers, which are commonly used to supply the high DC power required in industrial applications. In the proposed design, traditional silicon semiconductors are replaced with advanced SiC semiconductors, resulting in reduced switching losses and improved energy quality due to higher frequency switching. The new topology also offers solutions to challenges such as inrush current, reverse energy flow, and high DC output voltage issues typically encountered in IGBT-based rectifiers. The goal is for this topology to maximize efficiency and applicability. The proposed design is simulated in the Simulink environment, with the results presented in the findings section. To highlight the advantages of the new topology, the electrical parameters of the widely used three-phase full-bridge IGBT rectifier topology are employed for comparison.

关键词： Insulated gate bipolar transistor (IGBT)   integrator   junction temperature   maximum collector current falling rate (di(c)/dt(max))   printed circuit board (PCB) Rogowski coil  

摘要： Monitoring the junction temperature T-j of insulated gate bipolar transistor modules is crucial for reliable operation in medium/high voltage applications. Among the various temperature-sensitive electrical parameters, the maximum collector current falling rate di(C)/dt(max) is an effective indicator characterized by excellent linearity and amenability to real-time detection. However, current acquisition methods are prone to introduce parasitic parameters, and di(C)/dt(max) is also affected by the load current i(load). In response to these challenges, the printed circuit board Rogowski coil is proposed to measure di(C)/dt(max) and i(load), which can decouple the effect of i(load), and this method has the advantage of being contactless and integratable. In this article, the dependence of di(C)/dt(max) on T-j and i(load) is theoretically analyzed. The system design of the Rogowski coil current sensor, including coil structure, integrator, and peak detection circuit is carried out. The effective bandwidth and measurement accuracy of the sensor are verified based on the vector network analyzer and the double pulse test, and the effectiveness of the method for T-j estimation is verified based on the buck converter.

关键词： Insulated gate bipolar transistors   Degradation   Thermal degradation   Mathematical models   Junctions   Finite element analysis   Heating systems   Solid modeling   Packaging   Manufacturing   Chip solder degradation   compact thermal network model   finite-element method (FEM)   insulated gate bipolar transistor (IGBT)   long time scale  

摘要： The cause of failures in insulated gate bipolar transistor (IGBT) modules is primarily attributed to temperature-related factors. Accurately estimating the junction temperature of IGBT modules is crucial for enhancing their reliability. Currently, thermal network models stand as commonly used tools for estimating the junction temperature of IGBT modules. However, prevailing thermal models exhibit certain limitations in accurately predicting the junction temperature, particularly when considering the degradation of chip solder within IGBT modules. This article presents a practical degradation model of the chip solder layer, establishing a functional correlation between the chip solder degradation rate and the number of power cycles. A dynamic compact thermal network model over long time scales is established, and the method for thermal parameter extraction is discussed. The finite-element simulation and experimental results show that the dynamic compact thermal network model can accurately estimate the junction temperature.

关键词： Oscillators   Insulated gate bipolar transistors   Time-domain analysis   Voltage   Charge carrier processes   Semiconductor device measurement   Resistance   Analytical formula   nonpunch through (NPT) insulated gate bipolar transistor (IGBT) chips   plasma extraction transit time (PETT) oscillation   time-domain characteristic parameters   wide voltage range  

摘要： Plasma extraction transit time (PETT) oscillation belongs to the negative resistance oscillation, whose features vary greatly with operation conditions. Besides, these oscillation features determine PETT's electromagnetic interference emission level. Therefore, establishing an oscillation model is complex but necessary, especially for the time-domain model over a wide voltage range. This article presents an analytical formula for the PETT oscillation of the nonpunch through (NPT) planar insulated gate bipolar transistor (IGBT) chips. The formula in this article first proves that, in the NPT planar IGBT chips, there is an exponential relationship between the load current and the hole carrier concentration at the oscillation start moment. Then, the dc-link voltage, load current, and time are decoupled in the expression of the PETT oscillation. Moreover, for NPT planar IGBT chips, this analytical formula is well-matched with the experiment results from 700 to 2000 V at different load currents and temperatures, further verifying the proposed formula's accuracy.

关键词： Insulated gate bipolar transistors   Temperature measurement   Monitoring   Temperature sensors   Heating systems   Degradation   Mathematical models   Condition monitoring   multichip insulated gate bipolar transistor (IGBT) module   radiator temperature   thermal attenuation coefficient  

摘要： The multichip insulated gate bipolar transistor (IGBT) module has been widely used in the converter with high-power capacity. However, multichip IGBT module usually suffers from inhomogeneous thermal fatigue, which undermines the reliability of the whole assemble. This article proposed to use the multipoint temperature of radiator to monitor the health status of parallel chips in the IGBT module simultaneously. We show that the thermal attenuation coefficient of radiator temperature increases during the aging of device. Furthermore, this method enables quantifying the uneven degree of solder layer degradation, which is beneficial for the analysis of current distribution and thermal imbalance. Simulations in COMSOL and experimental tests on a pulsewidth modulation bridge were performed to verify the proposed approach. The influence of operating current, operating mode, cooling condition, sensor position and chip layout were also analyzed.