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关键词： IGBT   Junction temperature   Degradation   Neural networks   Electric vehicles  

摘要： A number of studies have focused on Insulated Gate Bipolar Transistor (IGBT) junction temperature prediction methods. Some methods introduce extra circuits or sensors for an invasive prediction. However, the most of current methods hardly consider the situation that the junction temperature prediction may be affected by the IGBT degradation after long term operation. In this paper, the neural network using DC link voltage, switching frequency, load current and Negative Thermal Coefficient thermistor (NTC) temperature as inputs is proposed for junction temperature online prediction. The neural network training is completed through the IGBT module tests. The accelerated aging tests are then performed to validate the neural network results over lifetime. The static and transient working conditions are respectively validated at different aging degrees. Finally, a neural network with good accuracy could be achieved by a series of experiments considering IGBT device degradation.

关键词： short-circuit current loop   short circuit current   Reliability   half-bridge circuit   series short-circuit fault   Power semiconductor devices   semiconductor device reliability   insulated gate bipolar transistors   lower saturation current level   silicon   IGBT   active neutral point clamped topology   bridge circuits   wide band gap semiconductors   elemental semiconductors   power MOSFET   voltage division features   Bipolar transistors   power electronics   dynamic characteristics   Insulated gate field effect transistors   protection circuit requirements   power electronic systems   SSC   Power electronics, supply and supervisory circuits   short-circuit currents   hybrid 3-L ANPC topology   junction temperature   power device   MOSFET   circuit parameters   voltage division investigation   silicon compounds   dc-bus voltage  

摘要： In power electronic systems, when a power device turns on by mistake, there would be at least two devices in the short-circuit (SC) current loop, forming series short-circuit (SSC) fault. In this paper, the dynamic characteristics of SiC MOSFETs, Si IGBTs in SSC are investigated based on the half-bridge circuit. The effect laws of load current and junction temperature to voltage division in SSC are discussed. Taking a three-level (3-L) active neutral point clamped (ANPC) topology based on hybrid utilization of Si IGBT and SiC MOSFET as the research object, the SSC performance is investigated. The theoretical and experimental results show that, in the process of SSC, the voltage division features of SiC MOSFETs and Si IGBTs are different and highly sensitive to circuit parameters. When both SiC MOSFET and Si IGBT are in the SC current loop, the device with a lower saturation current level limits the short circuit current and bears most of the dc-bus voltage. Moreover, in the Si/SiC hybrid 3-L ANPC topology, if the saturation current of selected SiC MOSFETs is higher than that of Si IGBTs, the SC withstanding level of SiC MOSFETs could be improved, thereby reducing the SC protection circuit requirements.

关键词： 3-D thermal network model   heat flux curves   insulated-gate bipolar transistors (IGBTs)   reliability   temperature effects  

摘要： With the continuous improvement of power densities and power levels for power converters, temperature information at critical sites of the power modules has become essential in health monitoring and thermal management. However, existing thermal models often ignore the temperature distributions of the chip and rarely discuss their applicability under high-temperature operation conditions. Here, a novel 3-D physical RC network model is proposed for insulated-gate bipolar transistor (IGBT) modules, which considers the temperature effects. This model can be efficiently and conveniently obtained with the assistance of finite-element method (FEM) steady-state thermal simulations. Based on the heat flux curves inside the power module, a novel method for 3-D RC parameters extraction is presented to monitor the temperatures at critical sites of the IGBT chip, and meanwhile, the temperature effects and uneven power loss distribution on the chip are considered. Compared with the prior-art Foster-type temperature-dependent 3-D thermal models, the modeling time cost for the proposed model has been remarkably reduced under the same computing hardware facilities since the temperature responses are no longer needed. Finally, FEM simulation and experimental results verify the effectiveness and accuracy of the proposed 3-D physical RC network model.

关键词： dIC/dt controllability   electromagnetic interference (EMI) noise   Miller capacitance (Cgc)   ON-state voltage (VON)   split-gate pMOS (SGPMOS) insulated-gate bipolar transistor (IGBT)  

摘要： 15-kV-scale 4H-SiC insulated-gate bipolar transistor (IGBT) with a self-biased split-gate pMOS (SGPMOS) is proposed and simulated in this work. By introducing the SGPMOS, the proposed IGBT forms a hole barrier in the ON-state and a hole extraction path during the turn-on and turn-off transient, respectively. Compared to GS IGBT, the ON-state voltage (VON) of the SGPMOS IGBT is decreased by 54.95% for the same turn-off loss (E-off). Meanwhile, compared with pMOS IGBT, the C-V and gate charge (Q(g)) characteristics exhibit that the Miller capacitance (C-gc) and Q(g) of the SGPMOS IGBT are reduced by 56.60% and 35.85%, respectively. Moreover, SGPMOS can extract the hole accumulated both under the gate oxide and in the P-shield region during the turn-on transient. This diminishes reverse displacement current (I-G_dis), contributing to low electromagnetic interference (EMI) noise. Simulation results demonstrate that, compared to pMOS IGBT, the SGPMOS IGBT achieves better controllability in peak turn-on current (Imax) and turn-on dIC/dt, featuring a 52.75% lower maximum reverse recovery dVKA/dt for the same turn-on loss (E-on).

关键词： Single-phase five-level PWM rectifier   Sliding mode proportional integral resonance   Coupled inductor   Current harmonic  

摘要： Multilevel PWM rectifiers are featured with low-voltage stress of switching devices, low harmonic content and suitable for high-voltage high-power applications. This paper presents a novel single-phase five-level PWM rectifier based on coupled inductor. In order to improve the dynamic response of the system and reduce the current harmonic content of the grid side, a sliding mode proportional integral resonance (PIR) control algorithm was proposed. Firstly, the circuit topology and working principle of the new single-phase five-level PWM rectifier were analysed. A mathematical model of the rectifier in d-q axis synchronous rotating reference frame was derived and analysed its voltage outer loop sliding mode and current inner loop PIR control algorithm. Compared with the traditional PI current control algorithm based on d-q axis, the proposed sliding mode PIR control algorithm has a faster dynamic response speed and a lower current harmonic content on the grid side. Finally, a simulation model based on MATLAB/Simulink and a hardware-in-the-loop real-time simulation experiment platform based on RT-lab were built up, and the proposed sliding mode PIR and the traditional PI current control algorithm based on d-q axis were compared. Simulation and experimental results have verified the correctness and feasibility of the proposed algorithm.

关键词： IGBT   Current filament   Self-heating   Avalanche   Boundary condition   Reliability design  

摘要： When designing the reliability of high voltage power devices, it is very useful to confirm the behavior of current filaments in various structures and situations by Technology CAD simulation. Current filaments are caused by the electrical instability inherent in the device when a large voltage is applied to the device or a large current flows through the device, which is the current concentration phenomenon into only a few cells and moves around mainly in the plane of the cell region of the device. The ease of movement of the current filament is determined by the design of the device structure and has a great impact on device reliability. This design is difficult to examine by actual measurement, so simulations are often used. Since device simulations with a large three-dimensional (3D) structure take a huge amount of calculation time, it is common to cut out a part of the chip as small as possible and set boundary conditions on each cut surface to build a simulation setup that fits the purpose of the simulation. In 2D current filament simulations, it is known that when the reflective boundary condition (ideal Neumann) are imposed on the sidewalls, the boundary condition can significantly affect the results. In this work, to the best of my knowledge, I clearly show for the first time the relationship between the current filament movements and lateral boundary conditions in a large-scale three-dimensional trench-gate IGBT structure under conditions especially in which the current filament is highly mobile. In this case, the convergence is very poor and the calculation is difficult, so I also describe how to calculate it well by mathematical settings.

关键词： Strain   Insulated gate bipolar transistors   Switches   Deformable models   Fluctuations   Reliability   Analytical models   Deformation characterization   dynamic field reconstruction   insulated gate bipolar transistor (IGBT) chips   switching conditions  

摘要： Insulated gate bipolar transistor (IGBT) chips are crucial core components in power electronic modules. It is of great significance to investigate the deformation characteristics of IGBT chips induced by the electro-thermal-mechanical coupling. In this article, a field reconstruction technique based on scanning laser displacement measurement is developed to accurately capture the dynamic deformation field distribution on the surface of IGBT chips. Based on this method, a comprehensive investigation of the impacts of switching conditions on the deformation fluctuation characteristics of IGBT chips is implemented. The results indicate the middle region of the IGBT chip suffers from a relatively larger deformation compared to the edge area. In particular, the largest deformation fluctuation occurs near the heel of bonding wires. In addition, it is also observed that the deformation fluctuation is negatively correlated with the switching frequency, meanwhile positively related to load amplitude, and shows a trend of increasing first, and then, decreasing with duty cycle. This work provides an intuitive and effective method for the dynamic deformation field characterization of IGBT chips. Furthermore, the outcomes obtained in this article can also provide confident evidence and important data to facilitate more precise reliability analysis and evaluation for power electronic modules.

关键词： Insulated gate bipolar transistors   Clamps   Force   Logic gates   Finite element analysis   Analytical models   Conductivity   Insulated gate bipolar transistor (IGBT)   press-pack (PP)   short-circuit (SC) withstand capacity   unbalanced clamping force  

摘要： Press-pack insulated gate bipolar transistors (PP-IGBTs) modules have become the mainstream choice in high-power-density applications such as breakers. Sufficient short-circuit (SC) withstand capacity is the key to the safe operation of power electronic equipment. However, the effect of the unbalanced clamping force, which is experienced frequently in the multichip PP-IGBT, on the SC withstand capacity needs to be studied. First, an SC withstand test platform is established to calibrate the critical energy for different voltage levels. Second, the SC process and the withstand capacity for different clamping forces are investigated experimentally. Combined with the finite-element simulation results, the effect of the clamping force on the SC withstand capability is analyzed, and the weak parts are pointed out. An evaluation method of SC withstand capacity considering the effects of the voltage levels and the clamping force is proposed. Finally, the effect of the unbalanced clamping force is experimentally studied using parallel single-chip modules (PPI), and the SC withstand test of a 3300-V/200-A multichip module with unbalanced clamping force is carried out. The results show that the clamping force has little effect on the critical energy, but the module with greater clamping force has worse SC withstand capacity.

关键词： IGBT module   Solder layer   High temperature gradient   Fatigue mechanism   Inelastic strain energy density   Lifetime prediction  

摘要： With the increase in the power density of power semiconductor chips, the lateral temperature gradient over the chip surface becomes more pronounced. Temperature gradients play an important role in reliability evaluation of IGBTs and have attracted great attentions. In this paper, the influence of IGBT chip temperature gradients on the crack initiation site and propagation path of the solder layer is investigated by finite-element analysis (FEA). Results indicated that the temperature gradient could influence the mechanism of solder layer fatigue. With the temperature gradient increasing, the crack initiation site shifts from the edge of solder layer to the center. The crack propagation path also changed. The fatigue mechanism of the solder layer under high temperature gra-dients is investigated by FEA. The inelastic strain energy density per cycle (Delta W) is found to be unequal at crack initiation and crack propagation stages. Accordingly, a novel energy-based lifetime prediction model based on Darveaux's model for solder layer fatigue of IGBTs is proposed, which takes into account the variation of Delta W within these two stages and can better characterize the processes of crack initiation and propagation in the solder layer. Subsequently, two lifetimes of IGBT modules under accelerated aging tests from the existing publications are used to verify the effectiveness of the proposed model. Finally, the accelerated aging tests were carried out to support the theoretical analysis on the direction of crack propagation under high temperature gradients.

关键词： power semiconductor   insulated gate bipolar transistor (IGBT)   super-junction IGBT (SJBT)   trade-off   turn-off loss (E-off)   on-state voltage (V-on)   breakdown voltage (BV)   machine learning (ML)   neural network (NN)   optimization   reverse engineering  

摘要： An improved structure for an Insulated Gate Bipolar Transistor (IGBT) with a separated buffer layer is presented in order to improve the trade-off between the turn-off loss (E-off) and on-state voltage (V-on). However, it is difficult to set efficient parameters due to the increase in the new buffer doping concentration variable. Therefore, a machine learning (ML) algorithm is proposed as a solution. Compared to the conventional Technology Computer-Aided Design (TCAD) simulation tool, it is demonstrated that incorporating the ML algorithm into the device analysis could make it possible to achieve high accuracy and significantly shorten the simulation time. Specifically, utilizing the ML algorithm could achieve coefficients of determination (R-2) of V-on and E-off of 0.995 and 0.968, respectively. In addition, it enables the optimized design to fit the target characteristics. In this study, the structure proposed for the trade-off improvement was targeted to obtain the minimum E-off at the same V-on, especially by adjusting the concentration of the separated buffer. We could improve E-off by 36.2% by optimizing the structure, which was expected to be improved by 24.7% using the ML approach. In another way, it is possible to inversely design four types of structures with characteristics close to the target characteristics (E-off = 1.64 mu J, V-on = 1.38 V). The proposed method of incorporating machine learning into device analysis is expected to be very strategic, especially for power electronics analysis (where the transistor size is comparatively large and requires significant computation). In summary, we improved the trade-off using a separated buffer, and ML enabled optimization and a more precise design, as well as reverse engineering.